Hardware-Accelerated Radio Channel Modeling
Peter Steenkiste , Electrical and Computer Engineering
The wireless network emulator is a wireless networking testbed that supports easy to control, repeatable networking experiments. It is being used by several research projects in wireless networking. We are looking for several students to both help us improve the emulator and to participate in wireless networking research. More information on the project can be found on the web page: http://www.cs.cmu.edu/%7eemulator
How do you simulate 5,000+ radio paths in real time? Or, how do you feed 2,000 processing units working on 2 terabits/s of streaming I/O? The wireless network emulator is a system for simulating radio propagation between real wireless devices.
Radio transmissions are digitized, modified in real time according to user-defined channel characteristics, and presented to receivers as suitable analog radio signals. This technique allows flexible, controlled experimentation with significant realism. This process is conceptually split between a general-purpose computer and custom FPGA-based hardware: Channel properties are *determined* in software but *applied* in hardware.
The purpose of this project is to move the hardware-software boundary so that more channel modeling can be done on FPGAs. This will involve a mixture of implementing known algorithms (based on previous work in our group and elsewhere) and open-ended research and design.
The ideal student will have:
- Comfort in digital hardware design
- Familiarity with Verilog for FPGA programming or chip design
- Comfort with random variables and signals (*e.g.* 18-290/396)
- Comfort with digital signal processing (*e.g.* 18-491)
- Interest in wireless communication and networking
Interested students should contact Prof. Peter Steenkiste with a CV and recent transcript.